Polycrystalline silicon solar cells can be divided into two types: bulk polycrystalline silicon (bulk multicrystalline) and thin-film polycrystalline silicon (thin-film polycrystalline). This section first introduces bulk polycrystalline silicon solar cells.
Monocrystalline silicon solar cells have disadvantages such as high cost and small wafer size. Polycrystalline silicon solar cells are another choice for solar cells due to their advantages of reducing cell cost and increasing the use area. However, polysilicon defects and potential barriers at the grain boundaries cause solar cell short-circuit current and conversion efficiency to decrease in order to reduce these negative effects. In fact, some methods need to be developed to tune these grain boundaries and to use ITO (indium-tin-oxide) films  as the top electrode, which have high conductivity and high visible light transmittance.
Generally speaking, the fabrication steps of bulk polycrystalline silicon solar cells are as follows: substrate cleaning (such as organic cleaning), surface polishing (particle removal), preferential grain etching, doping of PN interface (such as POCI, doping Miscellaneous), back metallization treatment (such as Al back electrode), ITO front electrode treatment, etc. The main production process and conditions are roughly as follows: use a 10 cm × 10 cm polysilicon substrate. The thickness is about 350um, the resistivity is in the range of 1~50/cm, the life of the minority current is more than 5,us, and the grain size varies from 5μm to 50um. The average size is 16.9um; the polysilicon substrate uses various etching methods. Preferential grain etching is carried out, then phosphorous (phosphorous) doping is used to form the interface, and X-type emitter interface is formed by diffusion. The ITO film is prepared by magnetron sputtering. Figure 1 shows the structure of a bulk polycrystalline silicon solar cell.
1. Surface texture of bulk polycrystalline silicon solar cells
For solar cells, silicon surface texturing is a very important key technology. Especially polycrystalline silicon solar cells. Its main purpose is to reduce surface reflection and increase cell efficiency, and surface texture can reduce light reflection from 35% to 50% to 20% to 25%. The traditional monocrystalline silicon solar cell etching method cannot be directly applied to the polycrystalline silicon surface because it has grains with different crystal orientations. Therefore, it is important to study the surface texture of polysilicon. There are different methods such as dry phase wet etching for the surface texture process of polysilicon crystal clusters, and the etched effects are also different.
Generally speaking, the wet method of silicon texture is to use HF-H NO3-based solvent, or use alkaline water-based solvent machine containing inorganic or organic salt (salt). A hemispherical structure is formed on the silicon surface by means of alkaline solvent etching. The anisotropic texture (anisotropic texturing) etched on the silicon surface by means of an acidic solvent is usually a pyramid or a tilted pyramid. For example, Park et al. use the spray method. The etching solution is a combination of HF-HNOx (1:20) based solvent, sulfuric acid (H2SO4), NaNO2 and other additives. Another method of silicon texturing is dry etching, such as reactive ion etching (RIE) or electron discharge etching.
1) Wet etching method
The wet etching method introduced here is a negative potential (NPD) method, in which the dissolution of silicon occurs only when the potential is lower than -10 V, while the surface texture of the silicon and the current time and potential are very important. Clear relationship, for single crystal silicon, increasing KOH concentration and negative potential can reduce etch time and roughness.
Figure 2 shows the current-time relationship curve of the NP D method in the electrolyte with a low alkaline concentration of 24% (mass fraction) KOH, and the potential range is -30~10 V. The greater the negative potential, the current will increase: 0.75 A at -10 VF, 2 A at -20 V, and 3 A at -30 V. In addition, Figure 2 shows that the current recordings at a 10 V and a 20 V were stable, but there was a significant reduction in cathodic current, probably due to the elimination of defect areas. The etch rate of polysilicon increases with the increase of the negative NPD potential, which is about 15.5 µ.m/h at 10 V, and can reach 60 µ.m/h at 30 V. However, at low potential and low etching rate, the defect area cannot be completely removed, resulting in a stable etching state within 600 s.
Figure 3 shows the SEM micrograph of polysilicon textured at -30V for 600 s by NP D method at a low alkaline concentration of 24% (mass fraction) KOH. Figure 3(a) shows the two main crystallographic orientations (100) and (110) of the polysilicon substrate resulting in two textured surface metallographic phases; steps.
Figure 4 shows the current-time curves of NPD at different alkaline concentrations (20%~50% KOH). The figure shows that 20% KOH can get the best cathode current of about 3.75 A at a 30 V; when the electrolyte concentration is slowly reduced to 24% KOH, the current is almost constant. However, when the electrolyte concentrations were 32%, 38% and 50% KOH, the maximum current values were 3.4~3.6 A, and the final currents dropped significantly to 1.5 A, 1.3 A and 1.5 A. 1 A, so increasing the KOH concentration will cause the current to decay rapidly.
Figure 5 shows the effect of alkaline electrolyte concentration on polysilicon surface; the conditions are – 30 V, 120 so Figures 5 Ca), C b) surface roughness under the condition of 24 % KOH It is obvious that only some areas have jagged damage Figures 5(c) and (d) are the anisotropic textured surfaces obtained at a concentration of 32 % KOH, and the jagged damage area is completely removed; Figures 5 (e) and (f) are 38 % and 50 %, respectively. % KOH. Its textured surface is not a general metallographic phase, but shows grain boundaries.
Figure 6 shows the light reflection spectrum of the polysilicon substrate after etching at -30 V and 120 s under the conditions of KOH electrolysis concentration of 24%, 32% and 38% by NPD method. The top curve in the figure is the polished polysilicon. The graph shows that the reflectance has a maximum value at a wavelength of 0.4µm and a minimum value at a wavelength of 0.72µm. The minimum reflectance of the obtained polysilicon textured surface at 32 % electrolyte concentration is 25.7 % (at 0.72 μm wavelength), while at 24 % and 38 % KOH concentration, the minimum reflectance is 28.3 % and 28.3 %, respectively. 34.7%. The above results show that the best surface metallography and the smallest reflectance can be obtained when the electrolyte concentration is 32 %. In addition, the main advantages of NPD texturing are the use of non-toxic electrolytes and a fast texturing process.
2) Dry etching method
Wet etching can etch a uniform surface on monocrystalline silicon, but on polycrystalline silicon wafers, due to the changeable crystal orientation, the uneven surface is caused, so that the polycrystalline silicon conversion efficiency cannot achieve the best effect. Inomata et al mentioned M. Takayama et al used NaOH solution to etch the surface in the fabrication process of 15 cm × 15 cm large-scale solar cells, and the maximum conversion efficiency obtained was 16. 4 % (Is c = 7. 96 A , VOC = 0. 611 V , FF = 0.759 ) , while Y. lnomata can obtain 17.09 % Usc = 8.136 A , V cx: = 0.621V , A = o.7615) conversion efficiency. The reason is that wet etching cannot effectively reduce surface reflection, because different crystal orientations of polysilicon surface have different etching rates, and when photolithography technology is used, wet etching is not suitable for mass production. Therefore, it is more suitable to use the RIE method to form a low-reflection polysilicon surface as a texture technology for large-area high-efficiency polysilicon solar cells.
The gas, gas flow, reaction pressure and RF power introduced in the RIE fabrication process will affect the results of polysilicon etching. The following is a brief introduction to the RIE method proposed by Y. Inomata, the result of which is to effectively form a uniform pyramid-like structure on the polysilicon surface, and this method can easily control the surface by controlling the flow rate of chlorine gas (Cl2). aspect ratio. The results shown in Figure 7 are a comparison of RIE dry etched and previously NaOH wet etched surfaces, with a clear reduction in reflectivity. The research team found that the maximum short-circuit current and the maximum open-circuit voltage can be obtained under the condition of a chlorine flow rate of 4.5 sccm.
2. Battery manufacturing and characteristics
Figure 8 shows the structure of a high-efficiency bulk polysilicon cell. The substrate of the battery is P-type polysilicon 15 cm×15 cm provided by the company, the thickness of the substrate is 270 µm, the surface texture is formed by passing 4.5 chlorine gas through RIE, and the front surface emitter is formed by diffusing PO Cl3 doping source. B SF is formed by screen printing and firing method of aluminum bonding, and Si N film is deposited by PE CVD as bulk passivation and anti-reflection layer, under N2/H 2 600℃ Bottom annealing, the top contact electrode (iron/silver) is patterned by vapor deposition and lift-off method, and then copper plating layer is used as the uppermost metal. Table 1 shows the efficiency performance of this solar cell, under two different emitter sheet resistances (52.0./□ and 89.0./□), it is clear that the fabrication using RIE yields a higher wettability than the previously mentioned NaOH Etch better short-circuit current and open-circuit voltage, and its highest efficiency can reach 17.09%, as shown in Figure 9.