Category Polycrystalline silicon solar cells

The types of high-efficiency thin-film polycrystalline silicon solar cells are classified by structure, and are roughly divided into natural surface texture and enhanced absorption with back reflector (NSTAR) solar cells and P-i-N tandem solar cells The following two categories will be introduced and discussed in detail.

1. Surface texture/back reflection enhanced absorption (N STAR) solar cell
The N STAR battery will be mainly published by the Japanese solar cell factory Kanaka Corporation. The company has many years of rich experience and excellent technology in this battery structure. The back reflection layer of the first generation NSTAR battery is not textured, and then the back reflection layer of the second generation battery is textured, and then to the third generation battery The cell incorporates light trapping technology to increase its efficiency from 10.7 % to 14.7 %, significantly improving the conversion efficiency.

1) NSTAR solar cell structure
The main structure of the NSTAR cell is glass/back reflector/NiP polysilicon/indium tin oxide (glass/back reflector/NiP poly-Si/ITO), in which the active i layer is a low temperature plasma chemical vapor Deposition method (plasma-enhanced chemical vapor deposition, PECVD).

Figure 1 shows the structure of the first-generation NSTAR thin-film polycrystalline silicon solar cell. One of the characteristics of the cell is that the surface presents a natural textured structure. The uppermost surface structure has a leaf-like shape. The cell with a thickness of 4µm has a roughness of 0.12µm. It is found by XRD measurement that the thin film polysilicon has a columnar structure and a preferred orientation of (110); its crystalline volume percentage is nearly 90% determined by ellipsometry analysis. Figure 2 ( a ) shows the structure of the first generation NSTAR, which is mainly characterized by natural surface texture and a flat back reflection layer; Figure 2 ( b ) shows the structure of the second generation NSTAR, the back reflection layer After texture treatment, it can improve its light absorption efficiency.

The third-generation NSTAR structure is to add an interlayer to increase the light trapping effect. As shown in Figure 3, its structure is an amorphous silicon/microcrystalline silicon (a-Si/μc-Si) PiN stack with an interlayer. The battery has an intermediate layer between the upper a-Si and the lower μc-Si.

2) Manufacturing steps of NSTAR solar cells
The experimental steps for the first-generation NSTAR structure (Figure 1) are described below. Typical NSTAR cell structure is ITO(800nm)/P-μe-Si:H(20nm)/i-poly-Si(4.7μm)/N–poly-Si(300nm)/P”-poly-Si(300nm) )/glass, the production steps are as follows.

The PECVD conditions for making P–poly-Si are RF power density=40mW/cm², H₂/SiH₄=40, B₂H₆/SiH₄=10^-6, pressure is 1 Torr, temperature is 200°C, and brick concentration is 10¹⁶cm^-3. The PECVD conditions of N⁺-poly-Si are RF power density=200mW/cm², .H₂/SiH₄=20, PH₃/SiH₄=10^-2 and pressure 1Torri, then a back reflection layer is formed on the glass substrate, and then PECVD is used to deposit The N-type Si thin film is deposited on the back reflection layer. Next, the i-poly-Si film is also deposited on the N-type Si film by PECVD, and then the P-type Si film is deposited to form a P-i-N junction. Indium tin oxide (ITO) is deposited on top of the solar cell as a transparent conductive electrode. The Ag grid electrode is made at the top. The maximum temperature for all manufacturing processes is 550°C.
The third-generation NSTAR structure is shown in Figure 3.

3) Efficiency of NSTAR solar cells
Japan’s Kaneka company has developed a stable 8% amorphous silicon single-junction large-area solar cell module through advanced process equipment, the size of which is 910mm × 55mm. Since the fall of 1999, the company has been capable of mass production of about 20MW of solar energy per year. Battery. When the company developed its next-generation thin-film silicon solar cells, the company focused on thin-film polysilicon and amorphous silicon tandem solar cells. In 1996, Meier of the University of Neuchatel invented a-Si/mc-Si stack cells with 7% microcrystalline silicon (c-Si) cells and an initial efficiency of 13%. In 1997, Kaneka used PECVD to manufacture low-temperature thin-film polycrystalline silicon solar cells on glass substrates with a cell thickness of 2.0 μm and a conversion efficiency of 10%. The company’s current focus is on improving the efficiency and mass production of a-Si/poly-Si stacked modules. Figure 4 shows the development timeline of Kaneka’s silicon thin-film-based solar cells and modules. It can be seen from the figure that the company is working on hybrid (HYBRID) solar cells (i.e. a-Si/poly-Si stack cells). In terms of mixed use), it has reached a state of stable production for many years.

Figure 5 shows the photovoltage characteristics of a 2.0 μm thick NSTAR cell [with Japan Quality Assurance (JQA) as the measurement standard], its intrinsic efficiency is 10.7%±.5%, and its aperture efficiency is 10.1% ±.5%, open circuit voltage (Voc) is 0.539V±0.005V, short circuit current, current density (Jsc) (essential) is 25.8±0.5mA/cm², short circuit current density (Jsc) (pore size) is 24.35±0.5mA /cm², the difference between the intrinsic efficiency and the aperture efficiency is that the aperture has a silver electrode on the ITO.

Figure 6 shows an a-Si/interlayer/poly-Si hybrid cell with an area of ​​1 cm², which can achieve an initial efficiency of 14.7% under optimized deposition conditions.

As shown in Figure 7, the large-area 910mm×455mm hybrid solar cell module mass-produced by Kaneka in 2004, its initial efficiency can reach 13.5% [Voc=137V, Isc=0.536A (Jsc=14.0mA/cm²), F_F =0.706].

2. P-i-N tandem solar cells
1) Introduction of P-i-N tandem solar cells
Recently, hydrogenated amorphous silicon (a-Si:H) single-junction solar cells have achieved efficiencies of up to 13% through continuous optimization of materials, interface fabrication, and device geometry. But in any case, because the band gap of a-Si devices is 1.7~1.8 eV, the average efficiency of a-Si can only reach 14%~15% according to theoretical calculations, and in practical applications, a-Si Si has obvious photo-induced degradation, and it has not been completely solved. To address the a-Si efficiency barrier, a stacked structure can be used in combination with narrow-gap materials to make the most of the solar radiation spectrum.

The advantages of a tandem solar cell integrating a Si and poly Si are as follows:
(1) Combining small energy gap poly-Si with high energy gap a-Si.
(2) The mature hydrogen passivation poly-Si thin film growth technology can be applied.
(3) There is no Steabler-Wronski effect at the underlying poly-Si junction.
(4) Low cost.
The efficiency of a-Si/poly-Si quadruple tandem solar cells can be as high as 20%.

2) Upper layer a-Si unijunction cell
The structure of a-Si/poly-Si four terminal tandem solar cell is an upper a-Si cell and a lower poly-Si cell. 5.23 shows an a-Si single heterojunction solar cell with the structure Glass/T CO/ P µc-SiC/ P a-SiC/a-SiC/ ia-Si/N µc-Si/ ITO/ Ag, in which the textured Glass/TCO structure has an optical confinement effect.

In this solar electric tree planting, the gas source is used as the plasma excitation gas, and the ECR (electron cyclotron resonance) plasma-enhanced CVD method is used for deposition at a low temperature of 180°C and a microwave power of 200 W fl£ A P 11.c-SiC electrode layer with an energy gap of 2.7 eV and a high dark conductivity of 0.1 S/cm was fabricated; then PaSiC/a-SiC/ia was formed by means of RF PECVD -Si/N PC-Si heterojunction structure; then ITO with a thickness of about 80 nm was fabricated by electron beam evaporation; finally, a silver backside electrode was used to provide high photon reflectivity. The device processes are all carried out at an average temperature of 200°C (except for the C P µc-SiC electrode layer). Because the Pµc-SiC layer is grown by ECR PECVD, the TCO layer is bombarded by dense hydrogen plasma in ECR plasma. So there are serious flaws. To eliminate this disadvantage, the TCO layer is overlaid on a plasma-resistive ZnO layer.

Figure 9 shows the optimized light output characteristics of a-Si single heterojunction solar cell, its efficiency is 12.3%, Voc=0.916 V, j SC = 19. am A/cm² and F_F = 70.6 % .

3) Lower poly Si battery
The underlying cell structure is ITO/P u c-SiC/P a -SiC/N poly-Si/N u c-Si/Al. Among them, the poly-Si substrate is a cast-wafer with a thickness of 250-300 μm and a resistivity of 0.5-5 Ω/cm. The fabrication steps of this cell are as follows: first, an N μc-Si layer is deposited on the backside of the acid-etched poly-Si wafer substrate by conventional methods to provide BSF effect between N-type poly-Si and Al electrodes and good Ohmic contact; a p-type a-SiC buffer layer is deposited on a clean poly-Si surface. The fabrication temperature is about 100 °C, and the microwave power is 200 W; then, at a higher temperature of 250 °C and 320 A P-type μc-SiC layer was deposited with a microwave power of W; finally, an ITO film with a thickness of 800 Å was deposited on the substrate by electron beam evaporation as the anti-reflection layer and front electrode.

4) a-Si and poly Si four-terminal stack cells
Figure 10 shows the structure of a-Si and poly-Si four-terminal stacked cells; Figure 11 shows the light output characteristics of a-Si and poly-Si four-terminal stacked cells. This four-terminal stack cell uses a-Si as its upper cell, and its intrinsic layer (i-layer) thickness is 100 nm; another P µc-SiC/N poly-Si heterojunction device is used as the lower cell. Among them, the upper cell efficiency is 7.25% ( Voc= 0.917 V , Jsc = 10.4m A/cm² , F_F = 76.0% ), while the lower cell efficiency is 13.75% (Voc = 0.575 V , Jsc = 30.2 mA /cm² , F_F = 79. 2 % ), so the total conversion efficiency of the entire stacked cell is as high as 21. 0 %.

Polycrystalline silicon solar cells can be divided into two types: bulk polycrystalline silicon (bulk multicrystalline) and thin-film polycrystalline silicon (thin-film polycrystalline). This section first introduces bulk polycrystalline silicon solar cells.

Monocrystalline silicon solar cells have disadvantages such as high cost and small wafer size. Polycrystalline silicon solar cells are another choice for solar cells due to their advantages of reducing cell cost and increasing the use area. However, polysilicon defects and potential barriers at the grain boundaries cause solar cell short-circuit current and conversion efficiency to decrease in order to reduce these negative effects. In fact, some methods need to be developed to tune these grain boundaries and to use ITO (indium-tin-oxide) films [32] as the top electrode, which have high conductivity and high visible light transmittance.

Generally speaking, the fabrication steps of bulk polycrystalline silicon solar cells are as follows: substrate cleaning (such as organic cleaning), surface polishing (particle removal), preferential grain etching, doping of PN interface (such as POCI, doping Miscellaneous), back metallization treatment (such as Al back electrode), ITO front electrode treatment, etc. The main production process and conditions are roughly as follows: use a 10 cm × 10 cm polysilicon substrate. The thickness is about 350um, the resistivity is in the range of 1~50/cm, the life of the minority current is more than 5,us, and the grain size varies from 5μm to 50um. The average size is 16.9um; the polysilicon substrate uses various etching methods. Preferential grain etching is carried out, then phosphorous (phosphorous) doping is used to form the interface, and X-type emitter interface is formed by diffusion. The ITO film is prepared by magnetron sputtering. Figure 1 shows the structure of a bulk polycrystalline silicon solar cell.

1. Surface texture of bulk polycrystalline silicon solar cells
For solar cells, silicon surface texturing is a very important key technology. Especially polycrystalline silicon solar cells. Its main purpose is to reduce surface reflection and increase cell efficiency, and surface texture can reduce light reflection from 35% to 50% to 20% to 25%. The traditional monocrystalline silicon solar cell etching method cannot be directly applied to the polycrystalline silicon surface because it has grains with different crystal orientations. Therefore, it is important to study the surface texture of polysilicon. There are different methods such as dry phase wet etching for the surface texture process of polysilicon crystal clusters, and the etched effects are also different.

Generally speaking, the wet method of silicon texture is to use HF-H NO3-based solvent, or use alkaline water-based solvent machine containing inorganic or organic salt (salt). A hemispherical structure is formed on the silicon surface by means of alkaline solvent etching. The anisotropic texture (anisotropic texturing) etched on the silicon surface by means of an acidic solvent is usually a pyramid or a tilted pyramid. For example, Park et al. use the spray method. The etching solution is a combination of HF-HNOx (1:20) based solvent, sulfuric acid (H2SO4), NaNO2 and other additives. Another method of silicon texturing is dry etching, such as reactive ion etching (RIE) or electron discharge etching.

1) Wet etching method
The wet etching method introduced here is a negative potential (NPD) method, in which the dissolution of silicon occurs only when the potential is lower than -10 V, while the surface texture of the silicon and the current time and potential are very important. Clear relationship, for single crystal silicon, increasing KOH concentration and negative potential can reduce etch time and roughness.

Figure 2 shows the current-time relationship curve of the NP D method in the electrolyte with a low alkaline concentration of 24% (mass fraction) KOH, and the potential range is -30~10 V. The greater the negative potential, the current will increase: 0.75 A at -10 VF, 2 A at -20 V, and 3 A at -30 V. In addition, Figure 2 shows that the current recordings at a 10 V and a 20 V were stable, but there was a significant reduction in cathodic current, probably due to the elimination of defect areas. The etch rate of polysilicon increases with the increase of the negative NPD potential, which is about 15.5 µ.m/h at 10 V, and can reach 60 µ.m/h at 30 V. However, at low potential and low etching rate, the defect area cannot be completely removed, resulting in a stable etching state within 600 s.

Figure 3 shows the SEM micrograph of polysilicon textured at -30V for 600 s by NP D method at a low alkaline concentration of 24% (mass fraction) KOH. Figure 3(a) shows the two main crystallographic orientations (100) and (110) of the polysilicon substrate resulting in two textured surface metallographic phases; steps.

Figure 4 shows the current-time curves of NPD at different alkaline concentrations (20%~50% KOH). The figure shows that 20% KOH can get the best cathode current of about 3.75 A at a 30 V; when the electrolyte concentration is slowly reduced to 24% KOH, the current is almost constant. However, when the electrolyte concentrations were 32%, 38% and 50% KOH, the maximum current values ​​were 3.4~3.6 A, and the final currents dropped significantly to 1.5 A, 1.3 A and 1.5 A. 1 A, so increasing the KOH concentration will cause the current to decay rapidly.

Figure 5 shows the effect of alkaline electrolyte concentration on polysilicon surface; the conditions are – 30 V, 120 so Figures 5 Ca), C b) surface roughness under the condition of 24 % KOH It is obvious that only some areas have jagged damage Figures 5(c) and (d) are the anisotropic textured surfaces obtained at a concentration of 32 % KOH, and the jagged damage area is completely removed; Figures 5 (e) and (f) are 38 % and 50 %, respectively. % KOH. Its textured surface is not a general metallographic phase, but shows grain boundaries.

Figure 6 shows the light reflection spectrum of the polysilicon substrate after etching at -30 V and 120 s under the conditions of KOH electrolysis concentration of 24%, 32% and 38% by NPD method. The top curve in the figure is the polished polysilicon. The graph shows that the reflectance has a maximum value at a wavelength of 0.4µm and a minimum value at a wavelength of 0.72µm. The minimum reflectance of the obtained polysilicon textured surface at 32 % electrolyte concentration is 25.7 % (at 0.72 μm wavelength), while at 24 % and 38 % KOH concentration, the minimum reflectance is 28.3 % and 28.3 %, respectively. 34.7%. The above results show that the best surface metallography and the smallest reflectance can be obtained when the electrolyte concentration is 32 %. In addition, the main advantages of NPD texturing are the use of non-toxic electrolytes and a fast texturing process.

2) Dry etching method
Wet etching can etch a uniform surface on monocrystalline silicon, but on polycrystalline silicon wafers, due to the changeable crystal orientation, the uneven surface is caused, so that the polycrystalline silicon conversion efficiency cannot achieve the best effect. Inomata et al mentioned M. Takayama et al used NaOH solution to etch the surface in the fabrication process of 15 cm × 15 cm large-scale solar cells, and the maximum conversion efficiency obtained was 16. 4 % (Is c = 7. 96 A , VOC = 0. 611 V , FF = 0.759 ) , while Y. lnomata can obtain 17.09 % Usc = 8.136 A , V cx: = 0.621V , A = o.7615) conversion efficiency. The reason is that wet etching cannot effectively reduce surface reflection, because different crystal orientations of polysilicon surface have different etching rates, and when photolithography technology is used, wet etching is not suitable for mass production. Therefore, it is more suitable to use the RIE method to form a low-reflection polysilicon surface as a texture technology for large-area high-efficiency polysilicon solar cells.

The gas, gas flow, reaction pressure and RF power introduced in the RIE fabrication process will affect the results of polysilicon etching. The following is a brief introduction to the RIE method proposed by Y. Inomata, the result of which is to effectively form a uniform pyramid-like structure on the polysilicon surface, and this method can easily control the surface by controlling the flow rate of chlorine gas (Cl2). aspect ratio. The results shown in Figure 7 are a comparison of RIE dry etched and previously NaOH wet etched surfaces, with a clear reduction in reflectivity. The research team found that the maximum short-circuit current and the maximum open-circuit voltage can be obtained under the condition of a chlorine flow rate of 4.5 sccm.

2. Battery manufacturing and characteristics
Figure 8 shows the structure of a high-efficiency bulk polysilicon cell. The substrate of the battery is P-type polysilicon 15 cm×15 cm provided by the company, the thickness of the substrate is 270 µm, the surface texture is formed by passing 4.5 chlorine gas through RIE, and the front surface emitter is formed by diffusing PO Cl3 doping source. B SF is formed by screen printing and firing method of aluminum bonding, and Si N film is deposited by PE CVD as bulk passivation and anti-reflection layer, under N2/H 2 600℃ Bottom annealing, the top contact electrode (iron/silver) is patterned by vapor deposition and lift-off method, and then copper plating layer is used as the uppermost metal. Table 1 shows the efficiency performance of this solar cell, under two different emitter sheet resistances (52.0./□ and 89.0./□), it is clear that the fabrication using RIE yields a higher wettability than the previously mentioned NaOH Etch better short-circuit current and open-circuit voltage, and its highest efficiency can reach 17.09%, as shown in Figure 9.

Generally speaking, solar cell structure design mainly considers two directions: one is to improve efficiency; the other is to reduce manufacturing cost. In order to improve efficiency, factors such as material, light absorption, junction depth, anti-reflection layer, surface passivation, texture, thin film stacking, etc. need to be considered. Through various considerations and analysis, the optimized photovoltaic (photovoltaic, PV) characteristics can be obtained. . The following mainly discusses the light storage, thin film stacking, hydrogen passivation and impurity adsorption of thin film polycrystalline silicon solar cells.

1. Light trapping technology
Light trapping technology is one of the main methods to increase the efficiency of solar cells. Because thin-film solar cells are only a few microns thick, they cannot absorb enough incident light and thus cannot obtain sufficient photocurrent. The trapped light can prolong the optical path of the incident light, so that the incident light can increase the multiple reflections of the light in the solar cell and the degree of absorption of the light by the active layer.

Light trapping technology often uses the following four methods:
(1) Surface texture reduces frontal reflection.
(2) Use a flat high reflectivity material as the bottom reflective layer.
(3) Internal light trapping.
(4) Add anti-reflection layer (AR coating).

Usually, the light-receiving surface of a solar cell is a flat mirror surface. If light is formed through surface texture, there will be multiple reflections on the active layer to reduce the reflection of light on the surface, so that the travel distance of the light is lengthened and the absorption of light by the battery is increased.

Figure 1(a) shows the bottom layer with a flat and high reflectivity reflective layer, and Figure 1(b) shows the bottom layer as a reflective layer through texture to increase its reflective optical path. In addition, the reflective layer can also be used as the back electrode of the solar cell. If the thickness of the reflective layer is less than 4µm, the pyramid structure cannot be formed, and the light trapping effect cannot be achieved. Therefore, the thickness of the reflective layer has an inseparable relationship with the trapping of light.

Another light trapping technology is called internal light trapping. This structure is to sandwich a transparent layer in a stacked solar cell, so that the incident light can be reused in the upper cell (amorphous silicon) to reduce the light attenuation of amorphous silicon. effect, thereby improving the efficiency of solar cells. Figure 2 shows the technical structure of an interlayer with internal light trapping. Figure 3 is a conceptual diagram showing the internal light trapping.

Adding anti-reflection film is another option for light trapping technology. For example, Si has a refractive index of 3.50 to 6.00 in the wavelength range of 400 to 1100 nm, so the reflection loss is 54% in the short wavelength range and 34% in the long wavelength range. In order to reduce the reflection loss, an anti-reflection coating (anti-reflection coating) is made of transparent materials with different refractive indices. The relationship between the optimal refractive index n and thickness d of the anti-reflection film and the wavelength λ of the incident light is:
λ=4nd·n²=n_sin_o
In the formula, n_si is the refractive index of Si; n_o is the refractive index of the environment. In the air environment, no=1, so the optimal refractive index of the anti-reflection film is n=(n_si) 1/2. Table 1 shows the refractive index of common antireflection coating materials.

2. Stack structure
Although the efficiency of solar cells made of thin-film polysilicon can reach 10%, the device efficiency is still lower than that of polysilicon solar cells made of bulk materials, so a breakthrough must be made in the structure of solar cells. Therefore, a two-layer or three-layer (hybrid) solar cell structure is used to achieve the desired efficiency. In order to make all the fabrications can be made at low temperature, the fabrication process of multilayer films from Player, i-layer to N layer are all made by CVD, forming a PiN stacked multilayer film structure. Reduce costs and simplify production steps. Because the solar cells of the multilayer thin film structure can absorb different incident light, and can use the existing materials and process methods to achieve better device characteristics, the use of stacked multi-layer solar cells has the following advantages:

(1) It can absorb a wider spectrum and use incident light as efficiently as possible.
( 2 ) A higher open circuit voltage (Voc) can be obtained.
(3) It can suppress the photo-degradation of solar cells.

In addition, the bottom layer of the stacked structure can use polysilicon (poly-Si) to absorb infrared wavelengths, and the upper layer can use amorphous silicon (Ca-Si) to reduce the surface recombination rate of polysilicon, so the current leaking from the rough surface of polysilicon will Reduced due to amorphous silicon layer.

Using the solar cell with this stacked structure can certainly improve the efficiency of the solar cell. If a transparent interlayer can be added to the structure, and applied and improved to achieve the internal light trapping effect, the efficiency of the solar cell can be further improved. effectiveness. Therefore, thin-film solar cells with stacked structure will be the focus of future development.

3. Hydrogen passivation of polysilicon
In order to reduce the intrinsic cost of solar cells, most low-cost polysilicon or thin-film polysilicon use substrates with lower intrinsic cost, resulting in poor crystalline quality and high impurity and defect content, which will seriously affect the diffusion length of charge carriers. Thus, the efficiency of the battery is greatly limited. An effective method to change this poor electrical quality of polysilicon is hydrogen passivation. This method uses hydrogen to remove impurities and defects in silicon and passivate grain boundaries. There are several methods for introducing hydrogen into silicon. The most common methods are diffusing hydrogen in plasma or depositing layers such as silicon nitride. Since these deposited layers are usually formed by plasma-enhanced chemical vapor deposition (PECVD), they may cause plasma-induced damage; recently, the use of microwave remote plasma oxygen passivation has been developed. (microwave-induced remote plasma hydrogen passivation, RPHP) method to avoid this problem. Another technique is the implantation of hydrogen ions, which involves implanting high concentrations of hydrogen near the surface of the silicon.

Commonly used polysilicon hydrogen passivation methods are as follows:
(1) SiN:H by PECVD, hydrogen diffusion from the silicon nitride deposition layer.
(2) Low-energy hydrogen ion implantation (HID) is performed with Kaufman ion swimming.
(3) Remote plasma hydrogen passivation (CRPHP).

In the high temperature fabrication step, using Si H4 as the supply gas for the PECVD deposition of silicon nitride, hydrogen can be diffused into the silicon layer at the same time, and the formed silicon amide layer (SiN layer) can be used as the front anti-reflection layer. . The main disadvantage of this method is that it requires high temperatures in excess of 600°C. The low-energy hydrogen ion implantation method can control the high concentration of hydrogen in the silicon towel, however, the backside of the silicon chip will cause defects due to ion bombardment. As for the remote plasma hydrogen passivation method, microwaves are used to generate low-temperature plasma remotely, and the low-temperature plasma is diffused to the test piece, so there is no ion bombardment phenomenon. The equipment structure is shown in Figure 4.

Remote plasma hydrogen passivation method equipment The remote plasma hydrogen passivation method is a plasma-enhanced annealing technology. The preferred production process parameters are to pass 40 sccm of hydrogen (H2) and 50 sccm of argon at 400 °C. (Ar) and 10 sccm of oxygen (O2) for 1 h at a pressure of 1 mbar and a microwave power of 200 W. As shown in Figure 5, the R P HP method has the best improvement effect on the effective diffusion length Leff of the minority carriers in the silicon crystal. Especially on grain boundaries.

4. Impurity adsorption of polysilicon
To improve the efficiency of polycrystalline silicon solar cells, effective impurity adsorption is widely used in solar cell processes. For polysilicon materials, phosphorus (P) adsorption and aluminum adsorption are the two most commonly used and effective warm-adsorption techniques. It can greatly improve the electrical properties of polysilicon. Phosphorus adsorption can use POCl3 diffusion to diffuse phosphorus atoms into polysilicon, while aluminum adsorption can be performed by electron beam evaporation of a 0.5 µm aluminum film on the silicon surface, followed by a process of high temperature annealing for several hours.

5. Polysilicon Film Deposition Technology
One of the main purposes of using thin-film polysilicon in solar cells is to improve efficiency and reduce costs. At the same time, the main process used in the solar cell can follow the existing mature technology of semiconductor technology, so it is highly compatible with general semiconductor technology in equipment and mass production. The two main thin film growth techniques required for polycrystalline silicon solar cells are described below:

(1) Vapor phase growth method.
( 2 ) Solid phase crystallization method.

Generally speaking, the low temperature polysilicon thin film process is mainly two kinds of vapor phase growth method and solid phase crystallization method. For the cost-effectiveness and performance improvement of solar cells, the following three items are very important:
(1) Manufactured at low temperature so that low-cost substrates can be used.
(2) Develop large-area technology, such as the application of amorphous silicon (a-Si: H) production technology.
(3) Reduce film thickness and develop optical enhancement structures. Vapor deposition is the most widely used technique for making polysilicon thin films, usually using plasma-enhanced or catalytic (hot-wire CVD) methods.

1). Vapor phase growth method
The vapor phase growth method is a more expensive and complex method for depositing silicon because of the large amount of precursor and diluent gases used in the vapor phase growth process. The main reason for using the vapor phase growth method is that a high-quality silicon thin film can be obtained.

The process methods of the vapor phase growth method are roughly as follows:
(1) Atmospheric pressure CVD (atmospheric pressure CVD, APCVD).
(2) Low pressure CVD (low pressure CVD, LPCVD).
(3) Rapid thermal CVD (rapid thermal CVD, RTCVD).
(4) plasma enhanced CVD (plasma enhanced CVD, PECVD).
( 5 ) Electron cyclotron resonance CVD (electron cyclotron resonance CVD, ECRCVD) o
(6) Hot wire CVD (hot-wire CVD, HWCVD).

2). Solid phase crystallization
It will be introduced that Japan Sanyo Company uses solid phase crystallization (SPC) to grow polycrystalline silicon thin films and use them on solar cells to improve conversion efficiency and reduce costs. The experimental results show that the solar cell has high light sensitivity in the long wavelength region, and there is no light-induced degradation phenomenon after exposure to light.

The SPC method uses a PECVD a-Si film as a pre-step for forming a polysilicon film. Figure 6 is a schematic diagram of the SPC method, which is mainly composed of two steps. The first step is to deposit a phosphorus-doped a-Si film on the substrate by PECVD; the second step is to recrystallize the phosphorus-doped a-Si film into an N-type polysilicon film using a low-temperature annealing method at about 600 °C.

This SPC method has the following three main advantages:
(1) The production process is very simple.
(2) The production process temperature is low.
(3) Suitable for making large-area solar cells.

At present, more than 95% of commercial solar cells are made of silicon. The advantages of silicon are mainly due to its abundant raw materials, mature process technology and no toxicity. The cost of silicon wafers accounts for 40% to 60% of the entire process, so material cost is an important issue. Both single-crystalline silicon (sc-Si) and multi-crystalline silicon (mc-Si) wafers are widely used, especially polycrystalline silicon wafers have great application potential due to their low cost advantages. Gradually increasing trend yang. The conversion efficiency of commercial polycrystalline silicon solar cells is generally 12% to 15%, and can be as high as 17% with more sophisticated solar cell designs. The potential of polysilicon is very high, and its efficiency has been increased to about 20% in the laboratory recently, which greatly increases its commercial viability.

The performance of polycrystalline silicon solar cells is mainly limited by the minority carrier recombination rate. During the crystallization process, the material will produce different defect structures, which determine and limit the efficiency of the cell. Generally speaking, dislocations and intra-grain defects, such as internal impurities, atomic clusters or precipitates, are the main reasons for the recombination of carriers; for relatively large grains on the centimeter scale, The grain boundaries become irrelevant.

Most of the cost of solar cells comes from the cost of substrates and manufacturing. Early solar cells are dominated by monocrystalline silicon. Because it can provide good conversion efficiency and use mature semiconductor manufacturing technology, it is generally used under non-cost considerations. In non-electric applications or artificial satellites or scientific experiments that require small area and high power generation, such as automobiles, etc. If it is to be commercialized and popularized, the cost of the product is an urgent problem that we need to solve, so the solar cell technology of polysilicon and amorphous silicon came into being.

There are two types of polycrystalline silicon solar cells: bulk polycrystalline silicon (bulk silicon) and thin-film polycrystalline silicon (thin-film pol e silicon). Because thin-film polycrystalline silicon has the advantages of reducing the dependence on wafers and reducing cost, so polycrystalline silicon thin-film solar cells are used. is an important trend yang. Because the thickness of the light absorbing layer of the solar cell is 2~3 times the thickness that the sunlight can absorb, and most of the electron-hole pairs act at the interface, it is only necessary to ensure that the grain size of the polysilicon film is larger than that of the film. thick, so that there are more minority carriers for effective power generation at the interface than short-lived carriers that flow into the grain boundaries, thereby suppressing the influence of grain boundaries, and then using an inexpensive substrate to make tandem silicon thin films (tandem thin films) -film) structure to form thin-film solar cells, and large-area solar cell modules can be fabricated.